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luke
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OpenRAM
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https://github.com/VLSIDA/OpenRAM.git
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fccdc3c45b5e551a76c8edff72a3bb7e9d816295
OpenRAM
/
technology
/
scn4m_subm
T
History
Eren Dogan
fccdc3c45b
Use library imports globally
2022-11-27 13:01:20 -08:00
..
gds_lib
Move power pins to horizontal or vertical layer in all cells.
2022-03-31 16:36:19 -07:00
mag_lib
Rework bitcells.
2020-11-13 10:07:40 -08:00
models
Adjusted vth0 of FF and SS models in scn4m from nominal.
2019-10-07 15:26:20 -07:00
sim_data
Added more data for regression modules.
2021-06-21 17:21:00 -07:00
sp_lib
Rework bitcells.
2020-11-13 10:07:40 -08:00
tech
Use library imports globally
2022-11-27 13:01:20 -08:00
tf
Add draft lyt file -- connectivity not working
2020-08-14 10:38:22 -07:00
__init__.py
update copyright year.
2021-01-22 11:24:53 -08:00