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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-31 10:15:46 +02:00
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fbc2d772be14916cbb3da67bcf49f6e183ae59db
OpenRAM/technology/scn3me_subm/mag_lib
T
History
Matt Guthaus 9559421ca8 Connect dff array clk in rows and columns.
2018-02-14 16:46:26 -08:00
..
cell_6t.mag
Add extra pwc to 6T SCMOS cell.
2018-02-05 14:44:15 -08:00
dff.mag
Connect dff array clk in rows and columns.
2018-02-14 16:46:26 -08:00
ms_flop.mag
…
replica_cell_6t.mag
Add extra pwc to 6T SCMOS cell.
2018-02-05 14:44:15 -08:00
sense_amp.mag
…
tri_gate.mag
Fixed bug with missing tri gate via.
2018-01-29 17:29:30 -08:00
write_driver.mag
Fix pin names to lower case. Fix write driver DRC errors and LVS error.
2018-01-31 17:37:16 -08:00
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