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OpenRAM
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OpenRAM/lib/scn3me_subm
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mguthaus f7a3fb90f0 Add SCMOS IP files. 2018-02-25 11:20:50 -08:00
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configs First set of IP library components. Some DRC/LVS errors exist. Some timing characterization errors exist. Logs included with errors. 2018-02-25 11:16:01 -08:00
gds Add SCMOS IP files. 2018-02-25 11:20:50 -08:00
lef Add SCMOS IP files. 2018-02-25 11:20:50 -08:00
lib Add SCMOS IP files. 2018-02-25 11:20:50 -08:00
sp Add SCMOS IP files. 2018-02-25 11:20:50 -08:00
verilog Add SCMOS IP files. 2018-02-25 11:20:50 -08:00
Makefile Adjust makefiles to continue on error. Turned on DRC/LVS to check for errors. 2018-02-23 15:46:13 -08:00