First set of IP library components. Some DRC/LVS errors exist. Some timing characterization errors exist. Logs included with errors.

lib/freepdk45/configs/sram_1rw_128b_1024w_1bank_freepdk45.py

@@ -3,3 +3,6 @@ num_words = 1024
 num_banks = 1
 
 tech_name = "freepdk45"
+process_corners = ["TT"]
+supply_voltages = [1.0]
+temperatures = [25]

lib/freepdk45/configs/sram_1rw_128b_1024w_2bank_freepdk45.py

@@ -3,3 +3,6 @@ num_words = 1024
 num_banks = 2
 
 tech_name = "freepdk45"
+process_corners = ["TT"]
+supply_voltages = [1.0]
+temperatures = [25]

lib/freepdk45/configs/sram_1rw_128b_1024w_4bank_freepdk45.py

@@ -3,3 +3,6 @@ num_words = 1024
 num_banks = 4
 
 tech_name = "freepdk45"
+process_corners = ["TT"]
+supply_voltages = [1.0]
+temperatures = [25]

lib/freepdk45/configs/sram_1rw_32b_1024w_1bank_freepdk45.py

@@ -3,3 +3,6 @@ num_words = 1024
 num_banks = 1
 
 tech_name = "freepdk45"
+process_corners = ["TT"]
+supply_voltages = [1.0]
+temperatures = [25]

lib/freepdk45/configs/sram_1rw_32b_2048w_1bank_freepdk45.py

@@ -3,3 +3,6 @@ num_words = 2048
 num_banks = 1
 
 tech_name = "freepdk45"
+process_corners = ["TT"]
+supply_voltages = [1.0]
+temperatures = [25]

lib/freepdk45/configs/sram_1rw_32b_256w_1bank_freepdk45.py

@@ -3,3 +3,6 @@ num_words = 256
 num_banks = 1
 
 tech_name = "freepdk45"
+process_corners = ["TT"]
+supply_voltages = [1.0]
+temperatures = [25]

lib/freepdk45/configs/sram_1rw_32b_512w_1bank_freepdk45.py

@@ -3,3 +3,6 @@ num_words = 512
 num_banks = 1
 
 tech_name = "freepdk45"
+process_corners = ["TT"]
+supply_voltages = [1.0]
+temperatures = [25]

lib/freepdk45/configs/sram_1rw_64b_1024w_1bank_freepdk45.py

@@ -3,3 +3,6 @@ num_words = 1024
 num_banks = 1
 
 tech_name = "freepdk45"
+process_corners = ["TT"]
+supply_voltages = [1.0]
+temperatures = [25]

lib/freepdk45/configs/sram_1rw_64b_1024w_2bank_freepdk45.py

@@ -3,3 +3,6 @@ num_words = 1024
 num_banks = 2
 
 tech_name = "freepdk45"
+process_corners = ["TT"]
+supply_voltages = [1.0]
+temperatures = [25]

lib/freepdk45/configs/sram_1rw_8b_1024w_1bank_freepdk45.py

@@ -3,3 +3,6 @@ num_words = 1024
 num_banks = 4
 
 tech_name = "freepdk45"
+process_corners = ["TT"]
+supply_voltages = [1.0]
+temperatures = [25]

lib/freepdk45/configs/sram_1rw_8b_256w_1bank_freepdk45.py

@@ -3,3 +3,6 @@ num_words = 256
 num_banks = 1
 
 tech_name = "freepdk45"
+process_corners = ["TT"]
+supply_voltages = [1.0]
+temperatures = [25]

lib/freepdk45/configs/sram_1rw_8b_512w_1bank_freepdk45.py

@@ -3,3 +3,6 @@ num_words = 512
 num_banks = 4
 
 tech_name = "freepdk45"
+process_corners = ["TT"]
+supply_voltages = [1.0]
+temperatures = [25]

lib/scn3me_subm/configs/sram_1rw_128b_1024w_1bank_scn3me_subm.py

@@ -3,3 +3,6 @@ num_words = 1024
 num_banks = 1
 
 tech_name = "scn3me_subm"
+process_corners = ["TT"]
+supply_voltages = [ 5.0 ]
+temperatures = [ 25 ]

lib/scn3me_subm/configs/sram_1rw_128b_1024w_2bank_scn3me_subm.py

@@ -3,3 +3,6 @@ num_words = 1024
 num_banks = 2
 
 tech_name = "scn3me_subm"
+process_corners = ["TT"]
+supply_voltages = [ 5.0 ]
+temperatures = [ 25 ]

lib/scn3me_subm/configs/sram_1rw_128b_1024w_4bank_scn3me_subm.py

@@ -3,3 +3,6 @@ num_words = 1024
 num_banks = 4
 
 tech_name = "scn3me_subm"
+process_corners = ["TT"]
+supply_voltages = [ 5.0 ]
+temperatures = [ 25 ]

lib/scn3me_subm/configs/sram_1rw_32b_1024w_1bank_scn3me_subm.py

@@ -3,3 +3,6 @@ num_words = 1024
 num_banks = 1
 
 tech_name = "scn3me_subm"
+process_corners = ["TT"]
+supply_voltages = [ 5.0 ]
+temperatures = [ 25 ]

lib/scn3me_subm/configs/sram_1rw_32b_2048w_1bank_scn3me_subm.py

@@ -3,3 +3,6 @@ num_words = 2048
 num_banks = 1
 
 tech_name = "scn3me_subm"
+process_corners = ["TT"]
+supply_voltages = [ 5.0 ]
+temperatures = [ 25 ]

lib/scn3me_subm/configs/sram_1rw_32b_256w_1bank_scn3me_subm.py

@@ -3,3 +3,6 @@ num_words = 256
 num_banks = 1
 
 tech_name = "scn3me_subm"
+process_corners = ["TT"]
+supply_voltages = [ 5.0 ]
+temperatures = [ 25 ]

lib/scn3me_subm/configs/sram_1rw_32b_512w_1bank_scn3me_subm.py

@@ -3,3 +3,6 @@ num_words = 512
 num_banks = 1
 
 tech_name = "scn3me_subm"
+process_corners = ["TT"]
+supply_voltages = [ 5.0 ]
+temperatures = [ 25 ]

lib/scn3me_subm/configs/sram_1rw_64b_1024w_1bank_scn3me_subm.py

@@ -3,3 +3,6 @@ num_words = 1024
 num_banks = 1
 
 tech_name = "scn3me_subm"
+process_corners = ["TT"]
+supply_voltages = [ 5.0 ]
+temperatures = [ 25 ]

lib/scn3me_subm/configs/sram_1rw_64b_1024w_2bank_scn3me_subm.py

@@ -3,3 +3,6 @@ num_words = 1024
 num_banks = 2
 
 tech_name = "scn3me_subm"
+process_corners = ["TT"]
+supply_voltages = [ 5.0 ]
+temperatures = [ 25 ]

lib/scn3me_subm/configs/sram_1rw_8b_1024w_1bank_scn3me_subm.py

@@ -3,3 +3,6 @@ num_words = 1024
 num_banks = 4
 
 tech_name = "scn3me_subm"
+process_corners = ["TT"]
+supply_voltages = [ 5.0 ]
+temperatures = [ 25 ]

lib/scn3me_subm/configs/sram_1rw_8b_256w_1bank_scn3me_subm.py

@@ -3,3 +3,6 @@ num_words = 256
 num_banks = 1
 
 tech_name = "scn3me_subm"
+process_corners = ["TT"]
+supply_voltages = [ 5.0 ]
+temperatures = [ 25 ]

lib/scn3me_subm/configs/sram_1rw_8b_512w_1bank_scn3me_subm.py

@@ -3,3 +3,6 @@ num_words = 512
 num_banks = 4
 
 tech_name = "scn3me_subm"
+process_corners = ["TT"]
+supply_voltages = [ 5.0 ]
+temperatures = [ 25 ]