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luke
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OpenRAM
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https://github.com/VLSIDA/OpenRAM.git
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2026-09-02 02:57:53 +02:00
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ebc91814e55ee4501bef7acf3cfa9465c7f9c96e
OpenRAM
/
technology
/
scn4m_subm
T
History
Hunter Nichols
ebc91814e5
Fixed various issues with imported code from CACTI, added CACTI as an option for analytical sim, added placeholder names in tech files for CACTI
2021-07-12 15:48:47 -07:00
..
gds_lib
Rework bitcells.
2020-11-13 10:07:40 -08:00
mag_lib
Rework bitcells.
2020-11-13 10:07:40 -08:00
models
Adjusted vth0 of FF and SS models in scn4m from nominal.
2019-10-07 15:26:20 -07:00
sim_data
Added more data for regression modules.
2021-06-21 17:21:00 -07:00
sp_lib
Rework bitcells.
2020-11-13 10:07:40 -08:00
tech
Fixed various issues with imported code from CACTI, added CACTI as an option for analytical sim, added placeholder names in tech files for CACTI
2021-07-12 15:48:47 -07:00
tf
Add draft lyt file -- connectivity not working
2020-08-14 10:38:22 -07:00
__init__.py
update copyright year.
2021-01-22 11:24:53 -08:00
