mirror of https://github.com/VLSIDA/OpenRAM.git
126 lines
3.9 KiB
Markdown
126 lines
3.9 KiB
Markdown
### [Go Back](./index.md#table-of-contents)
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# Technology Setup
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This page of the documentation explains the technology setup of OpenRAM.
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## Table of Contents
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1. [Technology Directories](#technology-directories)
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1. Technology Configuration:
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1. [Layer Map](#technology-configuration-layer-map)
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1. [GDS](#technology-configuration-gds)
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1. [DRC](#technology-configuration-drc)
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1. [SPICE](#technology-configuration-spice)
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1. [Parameters](#technology-configuration-parameters)
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## Technology Directories
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* Environment variable OPENRAM\_TECH specifies list of technology directories
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* Similar to `*nix $PATH`
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* Directory structure:
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```
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techname/
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__init__.py -- Sets up PDK environment
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tech/ -- Contains technology configuration
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__init__.py -- Loads all modules
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tech.py -- SPICE, DRC, GDS, and layer config
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gds_lib/ -- Contains .gds files for each lib cell
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sp_lib/ -- Contains .sp file for each lib cell
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models/ -- Contains SPICE device corner models
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(tf/) -- May contain some PDK material
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(mag_lib/) -- May contain other layout formats
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```
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## Technology Configuration: Layer Map
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* Layer map contains mapping of layer names to GDS layers
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* Layer names are used in OpenRAM code directly
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```python
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layer={}
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layer["vtg"] = -1
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layer["vth"] = -1
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layer["contact"] = 47
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layer["pwell"] = 41
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...
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layer["metal4"] = 31
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layer["text"] = 63
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layer["boundary"] = 63
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layer["blockage"] = 83
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```
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## Technology Configuration: GDS
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* OpenRAM uses the gdsMill library (included and heavily modified)
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* Units defined for GDS format
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* First number is DB units per user units
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* Second number is DB unit in meters
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```python
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# GDS file info
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GDS={}
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# gds units
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GDS["unit"]=(0.001,1e-6)
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# default label zoom
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GDS["zoom"] = 0.5
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```
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* Zoom defines default zoom for labels
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* More info on the GDS format at:
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* http://boolean.klaasholwerda.nl/interface/bnf/gdsformat.html
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## Technology Configuration: DRC
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* Creates the design\_rule class with several parts:
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* Grid size
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* Location of DRC, LVS, PEX rules and layer map
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* Subset of design rules for FEOL and BEOL
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* Design rules have common naming scheme (names used in OpenRAM)
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* `minwidth_<layer>`
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* `<layer>_to_<layer>`
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* `<layer>_extend_<layer>`
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* `minarea_<layer>`
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* Allows rule tables for complex rules
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```python
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# Minimum spacing of metal3 wider than 0.09 & longer than 0.3 = 0.09
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# Minimum spacing of metal3 wider than 0.27 & longer than 0.9 = 0.27
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# Minimum spacing of metal3 wider than 0.5 & longer than 1.8 = 0.5
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# Minimum spacing of metal3 wider than 0.9 & longer than 2.7 = 0.9
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# Minimum spacing of metal3 wider than 1.5 & longer than 4.0 = 1.5
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drc["metal3_to_metal3"] = drc_lut({(0.00, 0.0) : 0.07,
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(0.09, 0.3) : 0.09,
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(0.27, 0.9) : 0.27,
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(0.50, 1.8) : 0.5,
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(0.90, 2.7) : 0.9,
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(1.50, 4.0) : 1.5})
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```
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## Technology Configuration: SPICE
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* Device models (and corners)
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* Defaults simulation values
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* Voltage
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* Temperature
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* Feasible period for simulation
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* Rise/fall input slews
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* Analytical parameters
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* For example, device capacitance and "on" resistance
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* Used for analytical delay and power estimation
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## Technology Configuration: Parameters
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* Default design parameters
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* Being cleaned up and standardized...
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* Defaults simulation values
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* Voltage
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* Temperature
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* Feasible period for simulation
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* Rise/fall input slews
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* Analytical parameters
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* Used for analytical delay and power estimation
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* E.g. device capacitance and "on" resistance
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