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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-30 01:48:33 +02:00
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e8f1c19af6bc8469f70a4515878121dc8b743212
OpenRAM/technology/freepdk45
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Hunter Nichols 05773ad16e Altered 1rw,1r cell and replica to match tx widths pbitcell in freepdk45
2018-11-14 11:53:13 -08:00
..
gds_lib
Altered 1rw,1r cell and replica to match tx widths pbitcell in freepdk45
2018-11-14 11:53:13 -08:00
lib
…
sp_lib
Altered 1rw,1r cell and replica to match tx widths pbitcell in freepdk45
2018-11-14 11:53:13 -08:00
tech
Added sense amp enable delay calculation.
2018-11-08 23:54:18 -08:00
tf
…
layers.map
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