mirror of https://github.com/VLSIDA/OpenRAM.git
177 lines
5.0 KiB
Markdown
177 lines
5.0 KiB
Markdown
### [Go Back](./index.md#table-of-contents)
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# Basic Usage
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This page of the documentation explains the basic usage of OpenRAM.
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## Table of Contents
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1. [Environment Variable Setup](#environment-variable-setup-assuming-bash)
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2. [Command Line Usage](#command-line-usage)
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3. [Configuration Files](#configuration-files)
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4. [Common Configuration File Options](#common-configuration-file-options)
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5. [Output Files](#output-files)
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6. [Data Sheets](#data-sheets)
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## Environment Variable Setup (assuming bash)
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* OPENRAM_HOME defines where the compiler directory is
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* ```export OPENRAM_HOME="$HOME/openram/compiler"```
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* OPENRAM_TECH defines list of paths where the technologies exist
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* `export OPENRAM_TECH="$HOME/openram/technology"`
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* Colon separated list so you can have private technology directories
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* Must also have any PDK related variables set up
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* Add compiler to `PYTHONPATH`
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* `export PYTHONPATH="$PYTHONPATH:$OPENRAM_HOME"`
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## Command Line Usage
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Once you have defined the environment, you can run OpenRAM from the command line
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using a single configuration file written in Python.
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For example, create a file called *myconfig.py* specifying the following
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parameters for your memory:
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```
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# Data word size
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word_size = 2
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# Number of words in the memory
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num_words = 16
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# Technology to use in $OPENRAM_TECH
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tech_name = "scn4m_subm"
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# You can use the technology nominal corner only
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nominal_corner_only = True
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# Or you can specify particular corners
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# Process corners to characterize
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# process_corners = ["SS", "TT", "FF"]
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# Voltage corners to characterize
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# supply_voltages = [ 3.0, 3.3, 3.5 ]
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# Temperature corners to characterize
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# temperatures = [ 0, 25 100]
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# Output directory for the results
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output_path = "temp"
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# Output file base name
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output_name = "sram_{0}_{1}_{2}".format(word_size,num_words,tech_name)
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# Disable analytical models for full characterization (WARNING: slow!)
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# analytical_delay = False
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```
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You can then run OpenRAM by executing:
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```
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python3 $OPENRAM_HOME/openram.py myconfig
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```
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You can see all of the options for the configuration file in
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$OPENRAM\_HOME/options.py
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To run designs in Docker, it is suggested to use, for example:
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```
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cd OpenRAM/macros
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make example_config_scn4m_subm
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```
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* Common arguments:
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* `-t` specify technology (scn4m_subm or scmos or freepdk45)
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* `-v` increase verbosity of output
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* `-n` don't run DRC/LVS
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* `-c` perform simulation-based characterization
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* `-d` don't purge /tmp directory contents
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## Configuration Files
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* Memories are created using a Python configuration file to replicate results
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* No YAML, JSON, etc.
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* Complete configuration options are in `$OPENRAM_HOME/options.py`
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* Some options can be specified on the command line as well
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* Not recommended for replicating results
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* Example configuration file:
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```python
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# Data word size
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word_size = 2
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# Number of words in the memory
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num_words = 16
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# Technology to use in $OPENRAM_TECH
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tech_name = "scn4m_subm"
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# Process corners to characterize
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process_corners = [ "TT" ]
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# Voltage corners to characterize
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supply_voltages = [ 3.3 ]
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# Temperature corners to characterize
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temperatures = [ 25 ]
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# Output directory for the results
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output_path = "temp"
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# Output file base name
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output_name = "sram_16x2"
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# Disable analytical models for full characterization (WARNING: slow!)
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# analytical_delay = False
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# To force this to use magic and netgen for DRC/LVS/PEX
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# Could be calibre for FreePDK45
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drc_name = "magic"
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lvs_name = "netgen"
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pex_name = "magic"
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```
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## Common Configuration File Options
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* Characterization corners
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* `supply_voltages = [1.7, 1.8, 1.9]`
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* `temperatures = [25, 50, 100]`
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* `process_corners = ["SS", "TT", "FF"]`
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* Do not generate layout
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* `netlist_only = True`
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* Multi-port options
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* `num_rw_ports = 1`
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* `num_r_ports = 1`
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* `num_w_ports = 0`
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* Customized module or bit cell
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* `bitcell = "bitcell_1rw_1r"`
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* `replica_bitcell = "replica_bitcell_1rw_1r"`
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* Enable simulation characterization
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> **Warning**: Slow!
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* `analytical_delay = False`
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* Output name and location
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* `output_path = "temp"`
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* `output_name = "sram_32x256"`
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* Force tool selection (should match the PDK!)
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* `drc_name = "magic"`
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* `lvs_name = "netgen"`
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* `pex_name = "magic"`
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* Include shared configuration options using Python imports
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* `from corners_freepdk45 import *`
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## Output Files
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The output files are placed in the `output_dir` defined in the configuration file.
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The base name is specified by `output_name` and suffixes are added.
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The final results files are:
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* GDS (.gds)
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* SPICE (.sp)
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* Verilog (.v)
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* P&R Abstract (.lef)
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* Liberty (multiple corners .lib)
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* Datasheet (.html)
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* Log (.log)
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* Configuration (.py) for replication of creation
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## Data Sheets
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