OpenRAM/compiler/characterizer
Hunter Nichols 9fd473ce70 Fixed issue with selection of column address when checking bitline names. 2020-11-20 01:11:08 -08:00
..
__init__.py
bit_polarity.py
charutils.py
delay.py Fixed issue with selection of column address when checking bitline names. 2020-11-20 01:11:08 -08:00
functional.py
lib.py
logical_effort.py
measurements.py
model_check.py Changed named on delay chain sizing variable. Automatic sizing default is False. 2020-11-17 14:29:01 -08:00
setup_hold.py Add custom cell custom port order code. Update setup/hold to use it. 2020-11-17 11:12:59 -08:00
simulation.py Fixed issue with selection of column address when checking bitline names. 2020-11-20 01:11:08 -08:00
sram_op.py
stimuli.py
trim_spice.py