Logo
Explore Help
Sign In
luke/OpenRAM
Watch 1
Star 0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-30 01:48:33 +02:00
Code Issues Packages Projects Releases Wiki Activity
Files
d855d4f1a650d41946f2ef00645602877bdae2cd
OpenRAM/technology/scn3me_subm/tech
T
History
Matt Guthaus 4932d83afc Add design rules classes for complex design rules
2018-10-12 09:44:36 -07:00
..
__init__.py
Remove dead code ptx_port.
2018-01-19 16:19:05 -08:00
calibreDRC_scn3me_subm.rul
Add back scn3me_subm rule files
2016-11-09 09:32:26 -08:00
calibreLVS_scn3me_subm.rul
Add back scn3me_subm rule files
2016-11-09 09:32:26 -08:00
LICENSE.txt
Updated to include local magic rules
2018-08-15 09:46:23 -07:00
SCN3ME_SUBM.30.tech
Convert bounding box layer for SCMOS to bb, gds layer 63.
2018-09-04 13:05:21 -07:00
tech.py
Add design rules classes for complex design rules
2018-10-12 09:44:36 -07:00
Powered by Gitea Version: 1.27.2 Page: 258ms Template: 2ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API