OpenRAM/compiler/router
mrg a0e263b14a Add vdd/gnd pins to the side. 2021-05-03 15:14:15 -07:00
..
direction.py PEP8 cleanup 2021-02-23 13:32:13 -08:00
grid.py Update copyright year. 2021-01-22 11:23:28 -08:00
grid_cell.py Update copyright year. 2021-01-22 11:23:28 -08:00
grid_path.py Update copyright year. 2021-01-22 11:23:28 -08:00
grid_utils.py Update copyright year. 2021-01-22 11:23:28 -08:00
pin_group.py Add verbosity to error output 2021-04-07 16:07:56 -07:00
router.py Add vdd/gnd pins to the side. 2021-05-03 15:14:15 -07:00
router_tech.py Update copyright year. 2021-01-22 11:23:28 -08:00
signal_escape_router.py Add perimeter margin to expand pins outside perimeter for OpenRoad router. 2021-04-07 16:08:29 -07:00
signal_grid.py Update copyright year. 2021-01-22 11:23:28 -08:00
signal_router.py Update copyright year. 2021-01-22 11:23:28 -08:00
supply_grid.py Update copyright year. 2021-01-22 11:23:28 -08:00
supply_grid_router.py Update copyright year. 2021-01-22 11:23:28 -08:00
supply_tree_router.py Reduce verbosity of routing info 2021-03-31 09:38:06 -07:00
vector3d.py Update copyright year. 2021-01-22 11:23:28 -08:00