Logo
Explore Help
Sign In
luke/OpenRAM
Watch 1
Star 0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 09:30:38 +02:00
Code Issues Packages Projects Releases Wiki Activity
Files
cf4b2168888781633028f9043ceabde050e3ce6d
OpenRAM/compiler/characterizer
T
History
Michael Timothy Grimes cf4b216888 Correcting functional inheritance from simulation.
2018-10-04 13:55:59 -07:00
..
__init__.py
Adding simulation.py for common functions between functional and delay tests. Updating functional test.
2018-10-04 09:29:44 -07:00
charutils.py
Fix module import names for python3. Rename parse function to something meaningful.
2018-06-29 09:45:07 -07:00
delay.py
Updating functional test. Test can now run a spice simulation and read the dout values from the timing files.
2018-09-28 23:38:48 -07:00
functional.py
Correcting functional inheritance from simulation.
2018-10-04 13:55:59 -07:00
lib.py
Cleaned up control logic cycle creation in delay.py. Fixed bug which caused input data to be determined by the read ports.
2018-09-10 22:06:50 -07:00
setup_hold.py
Updating ms_flop removal.
2018-09-13 11:40:24 -07:00
simulation.py
Adding simulation.py for common functions between functional and delay tests. Updating functional test.
2018-10-04 09:29:44 -07:00
stimuli.py
Correcting functional inheritance from simulation.
2018-10-04 13:55:59 -07:00
trim_spice.py
Convert bitline index to integer in trim_spice
2018-07-26 14:29:44 -07:00
Powered by Gitea Version: 1.27.2 Page: 581ms Template: 9ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API