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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 17:39:02 +02:00
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cccde193d06c6098a3bf50e8fa7505efb1eec02d
OpenRAM/compiler/characterizer
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Matt Guthaus cccde193d0 Add ngspice equivalents of RUNLVL
2018-10-24 10:31:27 -07:00
..
__init__.py
Adding simulation.py for common functions between functional and delay tests. Updating functional test.
2018-10-04 09:29:44 -07:00
charutils.py
Fix module import names for python3. Rename parse function to something meaningful.
2018-06-29 09:45:07 -07:00
delay.py
Altered web to only be generated for rw ports.
2018-10-04 15:08:12 -07:00
functional.py
Added run-level option for write_control and enabled fast mode in functional tests
2018-10-24 09:32:44 -07:00
lib.py
fixed html typos, added logo, added placeholder timing and current, began ports section
2018-10-17 19:27:09 -07:00
setup_hold.py
Updating ms_flop removal.
2018-09-13 11:40:24 -07:00
simulation.py
Improved debug comments for functional test
2018-10-22 01:09:38 -07:00
stimuli.py
Add ngspice equivalents of RUNLVL
2018-10-24 10:31:27 -07:00
trim_spice.py
Fix trim spice with new names
2018-10-11 10:36:49 -07:00
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