OpenRAM/compiler/sram
mrg 58846a4a25 Limit wordline driver size. Place row addr dff near predecoders. 2020-07-20 17:57:38 -07:00
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sram.py Also write .lvs file since it can be different the .sp 2020-07-03 06:55:35 -07:00
sram_1bank.py Limit wordline driver size. Place row addr dff near predecoders. 2020-07-20 17:57:38 -07:00
sram_2bank.py Clean up and generalize layer rules. 2019-12-17 11:03:36 -08:00
sram_base.py Exit on DRC not run, check for LVSDRC before running in sram_base. 2020-07-14 08:38:49 -07:00
sram_config.py Add words_per_row and others in config file. 2020-07-13 12:37:56 -07:00