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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 09:30:38 +02:00
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c2a9e91dbad822d62c45ba0c24ef704ee14b004d
OpenRAM/compiler/base
T
History
Matt Guthaus c0d5f781cf Not sure how VCG channel constraint got removed. Fixed this bug before...
2018-07-27 15:15:40 -07:00
..
contact.py
Fix analytical power of contact with new hierarchy_design level introduced.
2018-07-10 10:17:23 -07:00
design.py
Refactor banked SRAM into multiple files and dynamically load in SRAM
2018-07-10 14:17:09 -07:00
geometry.py
…
hierarchy_design.py
Modify unit tests to reset options during init_openram so
2018-07-10 16:39:32 -07:00
hierarchy_layout.py
Not sure how VCG channel constraint got removed. Fixed this bug before...
2018-07-27 15:15:40 -07:00
hierarchy_spice.py
Convert entire OpenRAM to use python3. Works with Python 3.6.
2018-05-14 16:15:45 -07:00
lef.py
…
path.py
…
pin_layout.py
Convert entire OpenRAM to use python3. Works with Python 3.6.
2018-05-14 16:15:45 -07:00
route.py
…
utils.py
…
vector.py
…
verilog.py
…
wire.py
…
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