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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 01:24:39 +02:00
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bfc8428df7db5676694f2b562fdd30bd5dc578c5
OpenRAM/compiler/router
T
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Matt Guthaus bfc8428df7 Convert router tests to scn4m_subm
2018-09-17 13:30:30 -07:00
..
tests
Convert router tests to scn4m_subm
2018-09-17 13:30:30 -07:00
direction.py
Routing and connecting rails with vias done.
2018-09-07 14:46:58 -07:00
grid_cell.py
Routing and connecting rails with vias done.
2018-09-07 14:46:58 -07:00
grid_path.py
Routing and connecting rails with vias done.
2018-09-07 14:46:58 -07:00
grid.py
Converting grid data structures to sets to reduce size.
2018-09-13 09:10:29 -07:00
router.py
Converting grid data structures to sets to reduce size.
2018-09-13 09:10:29 -07:00
signal_grid.py
Routing and connecting rails with vias done.
2018-09-07 14:46:58 -07:00
signal_router.py
Converting grid data structures to sets to reduce size.
2018-09-13 09:10:29 -07:00
supply_grid.py
Working on methodology of blockages, pins, and routing multiple pins.
2018-09-08 18:55:36 -07:00
supply_router.py
Converting grid data structures to sets to reduce size.
2018-09-13 09:10:29 -07:00
vector3d.py
Routing and connecting rails with vias done.
2018-09-07 14:46:58 -07:00
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