OpenRAM/technology/freepdk45/tech
mrg 64f2f90664 Rework replica_bitcell_array supplies
Uses layer and direction preferences in tech file.
Places straps on left/right or top/bottom.
2022-04-19 08:50:11 -07:00
..
__init__.py update copyright year. 2021-01-22 11:24:53 -08:00
freepdk45.lydrc Do not run same well spacing for backwards compatibility. Add pbitcell cheat. 2021-11-22 11:33:27 -08:00
freepdk45.lylvs By default uniquify instances based on macro name. 2022-03-11 18:01:45 -08:00
freepdk45.lyp Initial klayout DRC/LVS options 2021-09-07 16:51:16 -07:00
freepdk45.lyt Initial klayout DRC/LVS options 2021-09-07 16:51:16 -07:00
scn4m_subm.lyp Add DRC rules and display files 2021-11-22 11:33:27 -08:00
scn4m_subm.lyt Add DRC rules and display files 2021-11-22 11:33:27 -08:00
tech.py Rework replica_bitcell_array supplies 2022-04-19 08:50:11 -07:00