OpenRAM/compiler/pgates
Matt Guthaus e827c1b8c7 Make pinvbuf have unique names for GDS compliance.
Add back gating of w_en since write should happen in second half
or else we will have write and precharge simultaneously active.
2018-07-26 11:40:40 -07:00
..
pbitcell.py Remove uniqe pbitcell id since it isn't needed. Convert dos EOL to unix EOL characters. Convert python2.7 to python3 in pbitcell. 2018-06-29 11:49:02 -07:00
pgate.py Add dffs to control logic. Rename layout pin segment/rect functions for consistency. Redo gnd/vdd pins in control. 2018-03-23 08:14:09 -07:00
pinv.py Convert entire OpenRAM to use python3. Works with Python 3.6. 2018-05-14 16:15:45 -07:00
pinvbuf.py Make pinvbuf have unique names for GDS compliance. 2018-07-26 11:40:40 -07:00
pnand2.py Convert entire OpenRAM to use python3. Works with Python 3.6. 2018-05-14 16:15:45 -07:00
pnand3.py Convert entire OpenRAM to use python3. Works with Python 3.6. 2018-05-14 16:15:45 -07:00
pnor2.py Convert entire OpenRAM to use python3. Works with Python 3.6. 2018-05-14 16:15:45 -07:00
precharge.py commiting changes from most recent pull from dev 2018-05-22 17:30:51 -07:00
ptx.py Convert entire OpenRAM to use python3. Works with Python 3.6. 2018-05-14 16:15:45 -07:00
single_level_column_mux.py Add enclosing well to column mux. Move well contact to cell boundary. 2018-06-29 11:35:29 -07:00