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OpenRAM
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OpenRAM/technology/scn3me_subm
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mrg aca46beb74 Add multiport bitcell spice 2019-05-08 16:17:19 -07:00
..
gds_lib Add back scn3me_subm tech files 2019-05-08 16:06:21 -07:00
mag_lib Add back scn3me_subm tech files 2019-05-08 16:06:21 -07:00
models Add back scn3me_subm tech files 2019-05-08 16:06:21 -07:00
sp_lib Add multiport bitcell spice 2019-05-08 16:17:19 -07:00
sue_lib Add back scn3me_subm tech files 2019-05-08 16:06:21 -07:00
tech Add back scn3me_subm tech files 2019-05-08 16:06:21 -07:00
tf Add back scn3me_subm tech files 2019-05-08 16:06:21 -07:00
__init__.py Add back scn3me_subm tech files 2019-05-08 16:06:21 -07:00