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__init__.py
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Use packages for imports.
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2022-07-13 15:55:57 -07:00 |
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channel_route.py
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Use packages for imports.
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2022-07-13 15:55:57 -07:00 |
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contact.py
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Use packages for imports.
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2022-07-13 15:55:57 -07:00 |
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delay_data.py
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Update copyright year.
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2021-01-22 11:23:28 -08:00 |
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design.py
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Use packages for imports.
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2022-07-13 15:55:57 -07:00 |
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errors.py
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Add exception errors file
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2020-04-08 16:55:45 -07:00 |
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geometry.py
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Use packages for imports.
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2022-07-13 15:55:57 -07:00 |
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hierarchy_design.py
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Use packages for imports.
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2022-07-13 15:55:57 -07:00 |
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hierarchy_layout.py
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Use packages for imports.
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2022-07-13 15:55:57 -07:00 |
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hierarchy_spice.py
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Use packages for imports.
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2022-07-13 15:55:57 -07:00 |
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lef.py
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Use packages for imports.
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2022-07-13 15:55:57 -07:00 |
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logical_effort.py
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Use packages for imports.
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2022-07-13 15:55:57 -07:00 |
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pin_layout.py
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Use packages for imports.
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2022-07-13 15:55:57 -07:00 |
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power_data.py
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Update copyright year.
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2021-01-22 11:23:28 -08:00 |
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route.py
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Use packages for imports.
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2022-07-13 15:55:57 -07:00 |
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timing_graph.py
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Added SA parameters for CACTI delay. Fixed syntax issues in several modules. Fixed issue with slew not being propogated to the next delay stage.
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2021-09-07 15:56:27 -07:00 |
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utils.py
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Use packages for imports.
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2022-07-13 15:55:57 -07:00 |
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vector.py
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Fix missing hash recompute in vector class.
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2022-05-17 13:30:41 -07:00 |
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vector3d.py
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Use packages for imports.
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2022-07-13 15:55:57 -07:00 |
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verilog.py
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Base-verilog
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2022-07-28 15:03:41 -07:00 |
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verilog_template.v
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Base template additions
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2022-07-28 15:03:41 -07:00 |
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wire.py
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Use packages for imports.
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2022-07-13 15:55:57 -07:00 |
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wire_path.py
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Use packages for imports.
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2022-07-13 15:55:57 -07:00 |
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wire_spice_model.py
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Added unit r and c values with m2 minwidth incorporated to match CACTI params
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2021-08-01 00:23:59 -07:00 |
a5728cdecc