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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 09:30:38 +02:00
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a51aacfa90ad8a5fc1302d2e26c61817e2a5afdd
OpenRAM/compiler/router
T
History
Matt Guthaus c51752d245 Provide more stats in -v output
2018-12-06 14:11:15 -08:00
..
tests
Simplifying supply router to single grid track
2018-12-04 08:41:57 -08:00
direction.py
Remove diagonal routing bug. Cleanup.
2018-11-02 14:57:40 -07:00
grid_cell.py
Remove diagonal routing bug. Cleanup.
2018-11-02 14:57:40 -07:00
grid_path.py
Remove diagonal routing bug. Cleanup.
2018-11-02 14:57:40 -07:00
grid_utils.py
Use grid furthest from blockages when blocked pin. Enclose multiple connectors.
2018-11-19 17:32:55 -08:00
grid.py
…
pin_group.py
Fix instersection bug. Improve primary and secondary pin algo.
2018-12-04 16:53:04 -08:00
router_tech.py
Cleanup code. Add time breakdown for SRAM creation.
2018-12-05 09:51:17 -08:00
router.py
Provide more stats in -v output
2018-12-06 14:11:15 -08:00
signal_grid.py
…
signal_router.py
…
supply_grid.py
…
supply_router.py
Provide more stats in -v output
2018-12-06 14:11:15 -08:00
vector3d.py
Use grid furthest from blockages when blocked pin. Enclose multiple connectors.
2018-11-19 17:32:55 -08:00
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