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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 17:39:02 +02:00
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8ec10cacd71b63ca31f8d19dc57a70fbc912467e
OpenRAM/compiler/sram
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Bob Vanhoof 9b8ef5ef57 fix: generated pex file was not passed correctly to lib characterizer
2020-08-03 10:16:12 +02:00
..
sram_1bank.py
Don't obstruct control logic signals with dffs when no column mux.
2020-07-29 10:31:18 -07:00
sram_2bank.py
Clean up and generalize layer rules.
2019-12-17 11:03:36 -08:00
sram_base.py
Exit on DRC not run, check for LVSDRC before running in sram_base.
2020-07-14 08:38:49 -07:00
sram_config.py
Add words_per_row and others in config file.
2020-07-13 12:37:56 -07:00
sram.py
fix: generated pex file was not passed correctly to lib characterizer
2020-08-03 10:16:12 +02:00
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