mrg 8909ad7165 Update modules to use variable bit offsets. ...

Bitcell arrays can return the bit offsets.
Port data and submodules can use offsets for spacing.
Default spacing for port data if no offsets given.

2020-09-11 15:36:22 -07:00

..

bank_select.py

Change inheritance inits to use super

2020-08-06 11:33:26 -07:00

bank.py

Update modules to use variable bit offsets.

2020-09-11 15:36:22 -07:00

bitcell_array.py

Merge branch 'dev' into wlbuffer

2020-09-10 13:05:14 -07:00

bitcell_base_array.py

Update modules to use variable bit offsets.

2020-09-11 15:36:22 -07:00

col_cap_array.py

Allow replica_bitcell_array without the replica columns for local wordlines.

2020-07-27 16:22:21 -07:00

control_logic.py

Removed dead code related to older characterization scheme

2020-08-27 17:30:58 -07:00

delay_chain.py

Removed dead code related to older characterization scheme

2020-08-27 17:30:58 -07:00

dff_array.py

Removed dead code related to older characterization scheme

2020-08-27 17:30:58 -07:00

dff_buf_array.py

Removed dead code related to older characterization scheme

2020-08-27 17:30:58 -07:00

dff_buf.py

Removed dead code related to older characterization scheme

2020-08-27 17:30:58 -07:00

dff_inv_array.py

Removed dead code related to older characterization scheme

2020-08-27 17:30:58 -07:00

dff_inv.py

Removed dead code related to older characterization scheme

2020-08-27 17:30:58 -07:00

dummy_array.py

Merge branch 'dev' into wlbuffer

2020-09-10 13:05:14 -07:00

global_bitcell_array.py

Update modules to use variable bit offsets.

2020-09-11 15:36:22 -07:00

hierarchical_decoder.py

Removed dead code related to older characterization scheme

2020-08-27 17:30:58 -07:00

hierarchical_predecode2x4.py

Change inheritance inits to use super

2020-08-06 11:33:26 -07:00

hierarchical_predecode3x8.py

Change inheritance inits to use super

2020-08-06 11:33:26 -07:00

hierarchical_predecode4x16.py

Change inheritance inits to use super

2020-08-06 11:33:26 -07:00

hierarchical_predecode.py

Change inheritance inits to use super

2020-08-06 11:33:26 -07:00

local_bitcell_array.py

Update modules to use variable bit offsets.

2020-09-11 15:36:22 -07:00

module_type.py

Cleanup and rename vias.

2020-01-30 01:45:33 +00:00

multibank.py

Change inheritance inits to use super

2020-08-06 11:33:26 -07:00

port_address.py

Change inheritance inits to use super

2020-08-06 11:33:26 -07:00

port_data.py

Update modules to use variable bit offsets.

2020-09-11 15:36:22 -07:00

precharge_array.py

Update modules to use variable bit offsets.

2020-09-11 15:36:22 -07:00

replica_bitcell_array.py

Update modules to use variable bit offsets.

2020-09-11 15:36:22 -07:00

replica_column.py

Use default names for replica_column too

2020-09-10 12:04:46 -07:00

row_cap_array.py

Allow replica_bitcell_array without the replica columns for local wordlines.

2020-07-27 16:22:21 -07:00

sense_amp_array.py

Update modules to use variable bit offsets.

2020-09-11 15:36:22 -07:00

sense_amp.py

Removed dead code related to older characterization scheme

2020-08-27 17:30:58 -07:00

single_level_column_mux_array.py

Update modules to use variable bit offsets.

2020-09-11 15:36:22 -07:00

tri_gate_array.py

Change inheritance inits to use super

2020-08-06 11:33:26 -07:00

wordline_buffer_array.py

Replica bitcell with all the fixings

2020-08-11 15:00:29 -07:00

wordline_driver_array.py

Removed dead code related to older characterization scheme

2020-08-27 17:30:58 -07:00

write_driver_array.py

Update modules to use variable bit offsets.

2020-09-11 15:36:22 -07:00

write_mask_and_array.py

Update modules to use variable bit offsets.

2020-09-11 15:36:22 -07:00