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https://github.com/VLSIDA/OpenRAM.git
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Matt Guthaus
63d0523228
Added scn4m_subm files (instead of scn4me_subm). Fixed missing cifoutput/cifinput in magic tech file and gds files. Fixed incorrect M3/via3/M4 design rules.
19 lines
574 B
Plaintext
19 lines
574 B
Plaintext
Pwell drawing 41 0
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Nwell drawing 42 0
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Active drawing 43 0
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Poly1 drawing 46 0
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Pselect drawing 45 0
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Nselect drawing 44 0
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contact drawing 25 0
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P1Con drawing 47 0
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ActX drawing 48 0
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Metal1 drawing 49 0
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Via drawing 50 0
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Metal2 drawing 51 0
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Via2 drawing 61 0
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Metal3 drawing 62 0
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Via3 drawing 30 0
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Metal4 drawing 31 0
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Glass drawing 52 0
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comment drawing 63 0
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