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mrg
c472a94f1e
Name them 1port and 2port consistently. Allow cell overrides to cell_1rw and cell_2rw or other. Will use 2rw for 1rw/1r, 2rw, 1w/1r, etc.
16 lines
359 B
SourcePawn
16 lines
359 B
SourcePawn
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.SUBCKT cell_1rw bl br wl vdd gnd
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* Inverter 1
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MM0 Q_bar Q gnd gnd NMOS_VTG W=205.00n L=50n
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MM4 Q_bar Q vdd vdd PMOS_VTG W=90n L=50n
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* Inverer 2
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MM1 Q Q_bar gnd gnd NMOS_VTG W=205.00n L=50n
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MM5 Q Q_bar vdd vdd PMOS_VTG W=90n L=50n
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* Access transistors
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MM3 bl wl Q gnd NMOS_VTG W=135.00n L=50n
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MM2 br wl Q_bar gnd NMOS_VTG W=135.00n L=50n
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.ENDS cell_1rw
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