mirror of https://github.com/VLSIDA/OpenRAM.git
62 lines
1.6 KiB
Python
62 lines
1.6 KiB
Python
#!/usr/bin/env python2.7
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"""
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Run a regresion test on various srams
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"""
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import unittest
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from testutils import header
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import sys,os
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sys.path.append(os.path.join(sys.path[0],".."))
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import globals
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import debug
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import calibre
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OPTS = globals.get_opts()
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#@unittest.skip("SKIPPING 21_timing_sram_test")
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class sram_func_test(unittest.TestCase):
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def runTest(self):
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globals.init_openram("config_20_{0}".format(OPTS.tech_name))
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# we will manually run lvs/drc
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OPTS.check_lvsdrc = False
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OPTS.use_pex = False
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import sram
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debug.info(1, "Testing timing for sample 1bit, 16words SRAM with 1 bank")
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s = sram.sram(word_size=OPTS.config.word_size,
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num_words=OPTS.config.num_words,
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num_banks=OPTS.config.num_banks,
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name="test_sram1")
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OPTS.check_lvsdrc = True
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import delay
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tempspice = OPTS.openram_temp + "temp.sp"
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s.sp_write(tempspice)
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probe_address = "1" * s.addr_size
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probe_data = s.word_size - 1
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debug.info(1, "Probe address {0} probe data {1}".format(probe_address, probe_data))
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d = delay.delay(s,tempspice)
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d.set_probe(probe_address,probe_data)
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# This will exit if it doesn't find a feasible period
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feasible_period = d.find_feasible_period(2.0)
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os.remove(tempspice)
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globals.end_openram()
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# instantiate a copdsay of the class to actually run the test
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if __name__ == "__main__":
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(OPTS, args) = globals.parse_args()
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del sys.argv[1:]
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header(__file__, OPTS.tech_name)
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unittest.main()
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