mirror of https://github.com/VLSIDA/OpenRAM.git
55 lines
1.5 KiB
Python
55 lines
1.5 KiB
Python
#!/usr/bin/env python2.7
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"""
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Run a regresion test on various srams
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"""
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import unittest
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from testutils import header,isclose
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import sys,os
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sys.path.append(os.path.join(sys.path[0],".."))
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import globals
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import debug
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import calibre
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OPTS = globals.get_opts()
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#@unittest.skip("SKIPPING 21_timing_sram_test")
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class timing_setup_test(unittest.TestCase):
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def runTest(self):
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globals.init_openram("config_20_{0}".format(OPTS.tech_name))
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# we will manually run lvs/drc
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OPTS.check_lvsdrc = False
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OPTS.use_pex = False
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OPTS.spice_version="hspice"
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OPTS.force_spice = True
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globals.set_spice()
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import sram
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import setup_hold
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sh = setup_hold.setup_hold()
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[one_setup_time, zero_setup_time] = sh.setup_time()
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OPTS.check_lvsdrc = True
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if OPTS.tech_name == "freepdk45":
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self.assertTrue(isclose(one_setup_time,0.0146484375))
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self.assertTrue(isclose(zero_setup_time,0.008544921875))
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elif OPTS.tech_name == "scn3me_subm":
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self.assertTrue(isclose(one_setup_time,0.0927734375))
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self.assertTrue(isclose(zero_setup_time,-0.0244140625))
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else:
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self.assertTrue(False) # other techs fail
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globals.end_openram()
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# instantiate a copdsay of the class to actually run the test
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if __name__ == "__main__":
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(OPTS, args) = globals.parse_args()
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del sys.argv[1:]
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header(__file__, OPTS.tech_name)
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unittest.main()
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