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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 09:30:38 +02:00
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7f46a0dead255cb4cbe3fd89028d6c0456da2ff6
OpenRAM/compiler/pgates
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Michael Timothy Grimes 7f46a0dead merging changes in bitcell.py
2018-04-03 09:46:12 -07:00
..
pbitcell.py
Added member functions to bitcell.py and pbitcell.py for use in bitcell_array.py. bitcell_array now used only one function for every type of bitcell.
2018-03-15 12:02:38 -07:00
pgate.py
Organize top-level files into subdirs.
2018-02-09 10:25:24 -08:00
pinv.py
Fixed comment style on power functions. Also added power parameters to scn3me_subm tech file and tested functionality.
2018-03-01 23:34:15 -08:00
pnand2.py
Fixed comment style on power functions. Also added power parameters to scn3me_subm tech file and tested functionality.
2018-03-01 23:34:15 -08:00
pnand3.py
Fixed comment style on power functions. Also added power parameters to scn3me_subm tech file and tested functionality.
2018-03-01 23:34:15 -08:00
pnor2.py
Fixed comment style on power functions. Also added power parameters to scn3me_subm tech file and tested functionality.
2018-03-01 23:34:15 -08:00
ptx.py
Organize top-level files into subdirs.
2018-02-09 10:25:24 -08:00
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