Logo
Explore Help
Sign In
luke/OpenRAM
Watch 1
Star 0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-09-07 11:21:14 +02:00
Code Issues Packages Projects Releases Wiki Activity
Files
7e89bbb9f5dcba9db9e0a8823bb74a874e070e58
OpenRAM/technology/scn4m_subm/gds_lib
T
History
mrg f7e3672c89 Route horizontal supplies in write driver.
2022-03-01 14:37:51 -08:00
..
cell_1rw.gds
Rework bitcells.
2020-11-13 10:07:40 -08:00
cell_2rw.gds
Route horizontal supplies in write driver.
2022-03-01 14:37:51 -08:00
dff.gds
update gds library, generalize geometry reverse transform function
2019-12-24 05:01:55 +00:00
dummy_cell_1rw.gds
Rework bitcells.
2020-11-13 10:07:40 -08:00
dummy_cell_2rw.gds
Route horizontal supplies in write driver.
2022-03-01 14:37:51 -08:00
replica_cell_1rw.gds
Remove label Q_bar from replica_cell_1rw due to Magic port bug
2022-01-13 14:38:59 -08:00
replica_cell_2rw.gds
Route horizontal supplies in write driver.
2022-03-01 14:37:51 -08:00
sense_amp.gds
update gds library, generalize geometry reverse transform function
2019-12-24 05:01:55 +00:00
tri_gate.gds
update gds library, generalize geometry reverse transform function
2019-12-24 05:01:55 +00:00
write_driver.gds
Add missing well tap
2022-02-25 10:44:40 -08:00
Powered by Gitea Version: 1.27.2 Page: 2373ms Template: 32ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API