mirror of https://github.com/VLSIDA/OpenRAM.git
330 lines
9.6 KiB
Plaintext
330 lines
9.6 KiB
Plaintext
library (sram_2_16_1_freepdk45_lib){
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delay_model : "table_lookup";
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time_unit : "1ns" ;
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voltage_unit : "1v" ;
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current_unit : "1mA" ;
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resistance_unit : "1kohm" ;
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capacitive_load_unit(1 ,fF) ;
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leakage_power_unit : "1mW" ;
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pulling_resistance_unit :"1kohm" ;
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operating_conditions(TT){
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voltage : 1.0 ;
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temperature : 25.000 ;
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}
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input_threshold_pct_fall : 50.0 ;
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output_threshold_pct_fall : 50.0 ;
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input_threshold_pct_rise : 50.0 ;
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output_threshold_pct_rise : 50.0 ;
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slew_lower_threshold_pct_fall : 10.0 ;
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slew_upper_threshold_pct_fall : 90.0 ;
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slew_lower_threshold_pct_rise : 10.0 ;
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slew_upper_threshold_pct_rise : 90.0 ;
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default_cell_leakage_power : 0.0 ;
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default_leakage_power_density : 0.0 ;
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default_input_pin_cap : 1.0 ;
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default_inout_pin_cap : 1.0 ;
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default_output_pin_cap : 0.0 ;
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default_max_transition : 0.5 ;
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default_fanout_load : 1.0 ;
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default_max_fanout : 4.0 ;
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default_connection_class : universal ;
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lu_table_template(CELL_TABLE){
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variable_1 : input_net_transition;
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variable_2 : total_output_net_capacitance;
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index_1("0.00125, 0.005, 0.04");
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index_2("0.052275, 0.2091, 1.6728");
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}
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lu_table_template(CONSTRAINT_TABLE){
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variable_1 : related_pin_transition;
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variable_2 : constrained_pin_transition;
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index_1("0.00125, 0.005, 0.04");
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index_2("0.00125, 0.005, 0.04");
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}
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default_operating_conditions : TT;
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type (DATA){
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base_type : array;
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data_type : bit;
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bit_width : 2;
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bit_from : 0;
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bit_to : 1;
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}
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type (ADDR){
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base_type : array;
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data_type : bit;
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bit_width : 4;
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bit_from : 0;
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bit_to : 3;
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}
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cell (sram_2_16_1_freepdk45){
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memory(){
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type : ram;
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address_width : 4;
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word_width : 2;
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}
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interface_timing : true;
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dont_use : true;
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map_only : true;
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dont_touch : true;
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area : 0.023625;
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bus(DATA){
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bus_type : DATA;
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direction : inout;
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max_capacitance : 1.6728;
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three_state : "!OEb & !clk";
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memory_write(){
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address : ADDR;
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clocked_on : clk;
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}
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memory_read(){
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address : ADDR;
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}
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pin(DATA[1:0]){
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internal_power(){
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when : "OEb & !clk";
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rise_power(scalar){
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values("0.027781");
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}
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fall_power(scalar){
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values("0.026752");
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}
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}
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timing(){
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timing_type : setup_rising;
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related_pin : "clk";
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rise_constraint(CONSTRAINT_TABLE) {
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values("0.009, 0.015, 0.027",\
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"0.009, 0.015, 0.027",\
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"0.009, 0.015, 0.027");
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}
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fall_constraint(CONSTRAINT_TABLE) {
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values("0.009, 0.009, 0.015",\
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"0.009, 0.009, 0.015",\
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"0.009, 0.009, 0.015");
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}
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}
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timing(){
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timing_type : hold_rising;
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related_pin : "clk";
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rise_constraint(CONSTRAINT_TABLE) {
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values("0.002, 0.002, -0.004",\
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"0.002, 0.002, -0.004",\
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"0.002, 0.002, -0.004");
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}
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fall_constraint(CONSTRAINT_TABLE) {
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values("-0.004, -0.004, -0.016",\
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"-0.004, -0.004, -0.016",\
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"-0.004, -0.004, -0.016");
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}
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}
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internal_power(){
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when : "!OEb & !clk";
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rise_power(scalar){
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values("0.031198");
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}
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fall_power(scalar){
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values("0.031252");
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}
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}
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timing(){
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timing_sense : non_unate;
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related_pin : "clk";
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timing_type : falling_edge;
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cell_rise(CELL_TABLE) {
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values("0.046, 0.047, 0.054",\
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"0.047, 0.047, 0.054",\
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"0.052, 0.052, 0.059");
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}
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cell_fall(CELL_TABLE) {
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values("0.132, 0.133, 0.142",\
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"0.133, 0.134, 0.142",\
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"0.138, 0.139, 0.147");
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}
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rise_transition(CELL_TABLE) {
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values("0.014, 0.015, 0.027",\
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"0.014, 0.015, 0.027",\
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"0.014, 0.015, 0.027");
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}
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fall_transition(CELL_TABLE) {
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values("0.018, 0.02, 0.036",\
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"0.019, 0.02, 0.036",\
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"0.019, 0.02, 0.036");
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}
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}
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}
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}
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bus(ADDR){
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bus_type : ADDR;
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direction : input;
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capacitance : 0.2091;
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max_transition : 0.04;
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fanout_load : 1.000000;
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pin(ADDR[3:0]){
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timing(){
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timing_type : setup_rising;
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related_pin : "clk";
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rise_constraint(CONSTRAINT_TABLE) {
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values("0.009, 0.015, 0.027",\
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"0.009, 0.015, 0.027",\
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"0.009, 0.015, 0.027");
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}
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fall_constraint(CONSTRAINT_TABLE) {
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values("0.009, 0.009, 0.015",\
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"0.009, 0.009, 0.015",\
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"0.009, 0.009, 0.015");
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}
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}
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timing(){
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timing_type : hold_rising;
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related_pin : "clk";
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rise_constraint(CONSTRAINT_TABLE) {
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values("0.002, 0.002, -0.004",\
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"0.002, 0.002, -0.004",\
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"0.002, 0.002, -0.004");
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}
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fall_constraint(CONSTRAINT_TABLE) {
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values("-0.004, -0.004, -0.016",\
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"-0.004, -0.004, -0.016",\
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"-0.004, -0.004, -0.016");
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}
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}
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}
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}
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pin(CSb){
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direction : input;
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capacitance : 0.2091;
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timing(){
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timing_type : setup_rising;
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related_pin : "clk";
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rise_constraint(CONSTRAINT_TABLE) {
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values("0.009, 0.015, 0.027",\
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"0.009, 0.015, 0.027",\
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"0.009, 0.015, 0.027");
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}
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fall_constraint(CONSTRAINT_TABLE) {
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values("0.009, 0.009, 0.015",\
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"0.009, 0.009, 0.015",\
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"0.009, 0.009, 0.015");
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}
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}
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timing(){
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timing_type : hold_rising;
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related_pin : "clk";
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rise_constraint(CONSTRAINT_TABLE) {
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values("0.002, 0.002, -0.004",\
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"0.002, 0.002, -0.004",\
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"0.002, 0.002, -0.004");
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}
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fall_constraint(CONSTRAINT_TABLE) {
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values("-0.004, -0.004, -0.016",\
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"-0.004, -0.004, -0.016",\
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"-0.004, -0.004, -0.016");
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}
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}
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}
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pin(OEb){
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direction : input;
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capacitance : 0.2091;
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timing(){
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timing_type : setup_rising;
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related_pin : "clk";
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rise_constraint(CONSTRAINT_TABLE) {
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values("0.009, 0.015, 0.027",\
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"0.009, 0.015, 0.027",\
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"0.009, 0.015, 0.027");
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}
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fall_constraint(CONSTRAINT_TABLE) {
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values("0.009, 0.009, 0.015",\
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"0.009, 0.009, 0.015",\
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"0.009, 0.009, 0.015");
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}
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}
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timing(){
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timing_type : hold_rising;
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related_pin : "clk";
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rise_constraint(CONSTRAINT_TABLE) {
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values("0.002, 0.002, -0.004",\
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"0.002, 0.002, -0.004",\
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"0.002, 0.002, -0.004");
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}
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fall_constraint(CONSTRAINT_TABLE) {
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values("-0.004, -0.004, -0.016",\
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"-0.004, -0.004, -0.016",\
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"-0.004, -0.004, -0.016");
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}
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}
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}
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pin(WEb){
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direction : input;
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capacitance : 0.2091;
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timing(){
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timing_type : setup_rising;
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related_pin : "clk";
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rise_constraint(CONSTRAINT_TABLE) {
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values("0.009, 0.015, 0.027",\
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"0.009, 0.015, 0.027",\
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"0.009, 0.015, 0.027");
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}
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fall_constraint(CONSTRAINT_TABLE) {
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values("0.009, 0.009, 0.015",\
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"0.009, 0.009, 0.015",\
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"0.009, 0.009, 0.015");
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}
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}
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timing(){
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timing_type : hold_rising;
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related_pin : "clk";
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rise_constraint(CONSTRAINT_TABLE) {
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values("0.002, 0.002, -0.004",\
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"0.002, 0.002, -0.004",\
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"0.002, 0.002, -0.004");
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}
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fall_constraint(CONSTRAINT_TABLE) {
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values("-0.004, -0.004, -0.016",\
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"-0.004, -0.004, -0.016",\
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"-0.004, -0.004, -0.016");
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}
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}
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}
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pin(clk){
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clock : true;
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direction : input;
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capacitance : 0.2091;
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timing(){
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timing_type :"min_pulse_width";
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related_pin : clk;
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rise_constraint(scalar) {
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values("0.1955");
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}
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fall_constraint(scalar) {
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values("0.1955");
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}
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}
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timing(){
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timing_type :"minimum_period";
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related_pin : clk;
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rise_constraint(scalar) {
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values("0.391");
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}
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fall_constraint(scalar) {
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values("0.391");
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}
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}
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}
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}
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}
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