OpenRAM/compiler
Sam Crow a5412902c6 all control logic tests pass now 2023-09-27 16:38:57 -07:00
..
base cleanup net_spice docstrings 2023-07-19 12:45:41 -07:00
characterizer Force to use bash for simulators 2023-08-10 16:05:24 -07:00
datasheet Update copyright year 2023-01-28 22:56:27 -08:00
drc Update copyright year 2023-01-28 22:56:27 -08:00
gdsMill Use library imports globally 2022-11-27 13:01:20 -08:00
model_configs Update copyright year 2023-01-28 22:56:27 -08:00
modules force multi-delay chain pinouts to be user configurable 2023-09-27 13:15:45 -07:00
router Fix derouting wires in the gridless router 2023-09-09 13:32:16 -07:00
tests all control logic tests pass now 2023-09-27 16:38:57 -07:00
verify Revert "add drc style drc(full) to run_drc.sh on Tim Edwards recommondation" 2023-09-26 11:37:04 -07:00
Makefile Change compiler name for unit tests 2022-11-06 14:05:08 -08:00
debug.py Update copyright year 2023-01-28 22:56:27 -08:00
gen_stimulus.py Merge branch 'dev' into char 2023-02-14 15:05:27 -08:00
globals.py Fix typo 2023-09-06 21:38:19 -07:00
model_data_util.py Update copyright year 2023-01-28 22:56:27 -08:00
options.py force multi-delay chain pinouts to be user configurable 2023-09-27 13:15:45 -07:00
rom.py Fixed formatting on all files 2023-06-14 12:28:36 -07:00
rom_config.py ROM binary file support 2023-04-03 16:04:12 -07:00
run_profile.sh Convert pin map to a set for faster membership. 2019-04-01 15:45:44 -07:00
sram.py Prevent same file error when copying the config file (VLSIDA/PrivateRAM#108) 2023-09-03 18:21:31 -07:00
sram_config.py Merge branch 'dev' into char 2023-02-14 15:05:27 -08:00
sram_factory.py Update copyright year 2023-01-28 22:56:27 -08:00
view_profile.py Update copyright year 2023-01-28 22:56:27 -08:00