mrg 2c76a2680f Adjust openram options. ... Remove option -d (dontpurge) and replace with keeptemp Add option -d (debug) to drop into pdb. Add option -k (--keeptemp) to keep temp files		2020-11-05 13:12:26 -08:00
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channel_route.py	Remove EOL whitespace globally	2020-11-03 06:29:17 -08:00
contact.py	Remove EOL whitespace globally	2020-11-03 06:29:17 -08:00
custom_cell_properties.py	Fix typo in 1w_1r bitcell	2020-11-03 17:14:45 -08:00
custom_layer_properties.py	Remove EOL whitespace globally	2020-11-03 06:29:17 -08:00
delay_data.py	Remove EOL whitespace globally	2020-11-03 06:29:17 -08:00
design.py	Use cell_properties to override cell names	2020-11-03 07:06:01 -08:00
errors.py	Add exception errors file	2020-04-08 16:55:45 -07:00
geometry.py	Remove EOL whitespace globally	2020-11-03 06:29:17 -08:00
graph_util.py	Remove EOL whitespace globally	2020-11-03 06:29:17 -08:00
hierarchy_design.py	Adjust openram options.	2020-11-05 13:12:26 -08:00
hierarchy_layout.py	Use custom cells when needed.	2020-11-03 11:58:25 -08:00
hierarchy_spice.py	Remove EOL whitespace globally	2020-11-03 06:29:17 -08:00
lef.py	Remove EOL whitespace globally	2020-11-03 06:29:17 -08:00
pin_layout.py	Remove EOL whitespace globally	2020-11-03 06:29:17 -08:00
power_data.py	Move classes to individual file.	2019-07-16 15:18:04 -07:00
route.py	Remove EOL whitespace globally	2020-11-03 06:29:17 -08:00
utils.py	Use bitcell_base for all bitcells. Fix missing setup_bitcell call	2020-11-02 17:00:15 -08:00
vector.py	Remove EOL whitespace globally	2020-11-03 06:29:17 -08:00
verilog.py	Remove EOL whitespace globally	2020-11-03 06:29:17 -08:00
wire.py	Remove EOL whitespace globally	2020-11-03 06:29:17 -08:00
wire_path.py	Remove EOL whitespace globally	2020-11-03 06:29:17 -08:00
wire_spice_model.py	Remove EOL whitespace globally	2020-11-03 06:29:17 -08:00