OpenRAM/compiler/verify
Matt Guthaus 696433b1ec Add bank_sel to bank_select module as input.
Remove reference to control in sram.
Add dff_buf_array to options.
Added inverted DFF
Add variable height pinvbuf
2018-03-23 08:13:39 -07:00
..
__init__.py Only check if using magic with freepdk when LVSDRC is enabled. 2018-01-17 07:38:29 -08:00
assura.py Improve global and code structure using modules. 2017-11-16 13:52:58 -08:00
calibre.py Change priority of debug info for DRC/LVS. 2018-02-25 11:14:31 -08:00
magic.py Add bank_sel to bank_select module as input. 2018-03-23 08:13:39 -07:00