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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-09-07 19:28:08 +02:00
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5ff49d322d282ff51201729e3b910dcec10a7431
OpenRAM/technology/scn3me_subm/tech
T
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Matt Guthaus 49bee6a96e Remove OEB signal since we split DIN/DOUT ports
2018-08-13 14:09:49 -07:00
..
__init__.py
Remove dead code ptx_port.
2018-01-19 16:19:05 -08:00
calibreDRC_scn3me_subm.rul
Add back scn3me_subm rule files
2016-11-09 09:32:26 -08:00
calibreLVS_scn3me_subm.rul
Add back scn3me_subm rule files
2016-11-09 09:32:26 -08:00
tech.py
Remove OEB signal since we split DIN/DOUT ports
2018-08-13 14:09:49 -07:00
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