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luke
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OpenRAM
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5f37677225a2f04101363ef794f3e327b46d7815
OpenRAM
/
compiler
/
bitcells
T
History
Hunter Nichols
80a325fe32
Added corner information for analytical power estimation.
2019-03-04 19:27:53 -08:00
..
bitcell_1rw_1r.py
Added corner information for analytical power estimation.
2019-03-04 19:27:53 -08:00
bitcell_1w_1r.py
Added corner information for analytical power estimation.
2019-03-04 19:27:53 -08:00
bitcell.py
Added corner information for analytical power estimation.
2019-03-04 19:27:53 -08:00
pbitcell.py
Added corner information for analytical power estimation.
2019-03-04 19:27:53 -08:00
replica_bitcell_1rw_1r.py
First draft of sram_factory code
2019-01-16 16:15:38 -08:00
replica_bitcell_1w_1r.py
Copy 1rw/1r cell to 1w/1r.
2019-02-24 09:54:45 -08:00
replica_bitcell.py
First draft of sram_factory code
2019-01-16 16:15:38 -08:00
replica_pbitcell.py
First draft of sram_factory code
2019-01-16 16:15:38 -08:00
