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luke
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OpenRAM
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https://github.com/VLSIDA/OpenRAM.git
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4f0806226825823ba372e626d495230ce10799ff
OpenRAM
/
technology
/
scn4m_subm
T
History
Hunter Nichols
4f08062268
Added custom 1rw+1r bitcell. Testing are currently failing.
2018-10-22 17:02:21 -07:00
..
gds_lib
Added scn4m_subm.
2018-09-13 12:53:35 -07:00
mag_lib
Added custom 1rw+1r bitcell. Testing are currently failing.
2018-10-22 17:02:21 -07:00
models
Added scn4m_subm.
2018-09-13 12:53:35 -07:00
sp_lib
Added scn4m_subm.
2018-09-13 12:53:35 -07:00
sue_lib
Added scn4m_subm.
2018-09-13 12:53:35 -07:00
tech
Add extra track spacings in some routes.
2018-09-13 14:12:24 -07:00
tf
Added scn4m_subm.
2018-09-13 12:53:35 -07:00
