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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 09:30:38 +02:00
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4c0fb2d7d12e5821d5ca86b3e0dcf5144e052068
OpenRAM/compiler/router
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Matt Guthaus 4c0fb2d7d1 Add space around route end rectangles. Separate pin and blockage conversions.
2017-05-24 15:36:30 -07:00
..
tests
Adding new pin shape conversion using design rules
2017-05-24 15:17:49 -07:00
cell.py
Fix multiple net routing cost reset bug.
2017-04-24 11:28:36 -07:00
grid.py
Adding new pin shape conversion using design rules
2017-05-24 15:17:49 -07:00
regress.sh
Added regress script for router
2016-11-18 11:21:39 -08:00
router.py
Add space around route end rectangles. Separate pin and blockage conversions.
2017-05-24 15:36:30 -07:00
vector3d.py
Fixed costs and view grid function so that we have better routes and less expansion.
2017-04-24 10:27:04 -07:00
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