mrg 355474ce2c Playing around with pnand2 pin spacing rules		2020-06-15 10:07:00 -07:00
..
pand2.py	Thin-cell decoder changes.	2020-05-29 10:36:07 -07:00
pand3.py	Vertical gates need both well contacts.	2020-05-13 16:54:35 -07:00
pbuf.py	Add no well option. Add stack gates vertical option.	2020-05-11 16:22:08 -07:00
pdriver.py	Thin-cell decoder changes.	2020-05-29 10:36:07 -07:00
pgate.py	Change s8 to sky130	2020-06-12 14:23:26 -07:00
pinv.py	Change s8 to sky130	2020-06-12 14:23:26 -07:00
pinv_dec.py	Update new tech name	2020-06-15 10:06:17 -07:00
pinvbuf.py	Fix pinvbuf layers	2020-06-09 17:16:35 -07:00
pnand2.py	Playing around with pnand2 pin spacing rules	2020-06-15 10:07:00 -07:00
pnand3.py	Add contact to gate design rule to max for spacing inputs	2020-06-14 14:18:08 -07:00
pnor2.py	Change s8 to sky130	2020-06-12 14:23:26 -07:00
precharge.py	Change s8 to sky130	2020-06-12 14:23:26 -07:00
ptristate_inv.py	Changes to simplify metal preferred directions and pitches.	2020-05-10 11:32:45 -07:00
ptx.py	DRC and LVS fixes for pinv_dec	2020-06-12 15:23:51 -07:00
pwrite_driver.py	Add boundary to all pgates	2020-04-21 15:21:57 -07:00
single_level_column_mux.py	Fix the bitline spacing in the column mux to a constant.	2020-06-03 15:47:03 -07:00
wordline_driver.py	Change s8 to sky130	2020-06-12 14:23:26 -07:00