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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 09:30:38 +02:00
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2053a1ca4d8ffc2d8a7543782a9010c29cc4b780
OpenRAM/compiler/characterizer
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Michael Timothy Grimes 2053a1ca4d Improved debug comments for functional test
2018-10-22 01:09:38 -07:00
..
__init__.py
Adding simulation.py for common functions between functional and delay tests. Updating functional test.
2018-10-04 09:29:44 -07:00
charutils.py
Fix module import names for python3. Rename parse function to something meaningful.
2018-06-29 09:45:07 -07:00
delay.py
Altered web to only be generated for rw ports.
2018-10-04 15:08:12 -07:00
functional.py
Improved debug comments for functional test
2018-10-22 01:09:38 -07:00
lib.py
fixed html typos, added logo, added placeholder timing and current, began ports section
2018-10-17 19:27:09 -07:00
setup_hold.py
Updating ms_flop removal.
2018-09-13 11:40:24 -07:00
simulation.py
Improved debug comments for functional test
2018-10-22 01:09:38 -07:00
stimuli.py
Improvements to functional test. Now will read or write in a random sequence, using randomly generated words and addresses, and using random ports in the multiported cases. Functional test still has some bugs that are being worked out so it will sometimes fail and sometimes not fail.
2018-10-08 06:34:36 -07:00
trim_spice.py
Fix trim spice with new names
2018-10-11 10:36:49 -07:00
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