OpenRAM/compiler/bitcells
mrg 87419bd640 Fix bitcell and pbitcell with different cell names 2020-11-03 11:30:40 -08:00
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bitcell.py Use bitcell_base for all bitcells. Fix missing setup_bitcell call 2020-11-02 17:00:15 -08:00
bitcell_1rw_1r.py Remove EOL whitespace globally 2020-11-03 06:29:17 -08:00
bitcell_1w_1r.py Fix bitcell and pbitcell with different cell names 2020-11-03 11:30:40 -08:00
bitcell_base.py Remove EOL whitespace globally 2020-11-03 06:29:17 -08:00
col_cap_bitcell_1rw_1r.py Remove EOL whitespace globally 2020-11-03 06:29:17 -08:00
dummy_bitcell.py Remove EOL whitespace globally 2020-11-03 06:29:17 -08:00
dummy_bitcell_1rw_1r.py Use bitcell_base for all bitcells. Fix missing setup_bitcell call 2020-11-02 17:00:15 -08:00
dummy_bitcell_1w_1r.py Use bitcell_base for all bitcells. Fix missing setup_bitcell call 2020-11-02 17:00:15 -08:00
dummy_pbitcell.py Fix bitcell and pbitcell with different cell names 2020-11-03 11:30:40 -08:00
pbitcell.py Fix bitcell and pbitcell with different cell names 2020-11-03 11:30:40 -08:00
replica_bitcell.py Remove EOL whitespace globally 2020-11-03 06:29:17 -08:00
replica_bitcell_1rw_1r.py Remove EOL whitespace globally 2020-11-03 06:29:17 -08:00
replica_bitcell_1w_1r.py Remove EOL whitespace globally 2020-11-03 06:29:17 -08:00
replica_pbitcell.py Fix bitcell and pbitcell with different cell names 2020-11-03 11:30:40 -08:00
row_cap_bitcell_1rw_1r.py PR from mithro + other changable GDS file names 2020-11-02 16:00:16 -08:00