OpenRAM/compiler/base
Bugra Onal a7cbf254be Merge branch 'dev' into char 2023-01-19 12:18:38 -08:00
..
__init__.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
channel_route.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
contact.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
delay_data.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
design.py Merge branch 'dev' into char 2023-01-19 12:18:38 -08:00
errors.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
geometry.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
hierarchy_design.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
hierarchy_layout.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
hierarchy_spice.py Line wrap output spice subckt and instance lines at 80 characters. 2022-12-12 13:58:30 -08:00
lef.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
logical_effort.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
pin_layout.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
power_data.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
route.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
timing_graph.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
utils.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
vector.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
vector3d.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
verilog.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
wire.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
wire_path.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00
wire_spice_model.py Add copyright check to code format test 2022-11-30 14:50:43 -08:00