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bank.py
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Undo delay changes. Fix bus order for DRC.
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2019-08-06 17:17:59 -07:00 |
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bank_select.py
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Fix pnand2 height in bank select. Unsure how it passed before.
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2019-07-03 15:12:22 -07:00 |
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bitcell_array.py
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Add direction to pins of all modules
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2019-08-06 14:14:09 -07:00 |
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control_logic.py
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Undo delay changes. Fix bus order for DRC.
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2019-08-06 17:17:59 -07:00 |
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delay_chain.py
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Add direction to pins of all modules
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2019-08-06 14:14:09 -07:00 |
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dff.py
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Merged and fixed conflicts with dev
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2019-06-25 16:55:50 -07:00 |
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dff_array.py
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Add direction to pins of all modules
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2019-08-06 14:14:09 -07:00 |
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dff_buf.py
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Add direction to pins of all modules
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2019-08-06 14:14:09 -07:00 |
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dff_buf_array.py
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Add direction to pins of all modules
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2019-08-06 14:14:09 -07:00 |
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dff_inv.py
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Merge branch 'pep8_cleanup' into dev
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2019-06-14 08:47:10 -07:00 |
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dff_inv_array.py
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Add direction to pins of all modules
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2019-08-06 14:14:09 -07:00 |
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dummy_array.py
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Add direction to pins of all modules
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2019-08-06 14:14:09 -07:00 |
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hierarchical_decoder.py
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Add direction to pins of all modules
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2019-08-06 14:14:09 -07:00 |
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hierarchical_predecode.py
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Add direction to pins of all modules
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2019-08-06 14:14:09 -07:00 |
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hierarchical_predecode2x4.py
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Merge branch 'pep8_cleanup' into dev
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2019-06-14 08:47:10 -07:00 |
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hierarchical_predecode3x8.py
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Merge branch 'pep8_cleanup' into dev
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2019-06-14 08:47:10 -07:00 |
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multibank.py
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Change num_wmask to num_wmasks and write_size = None not word_size if wmask not used.
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2019-07-19 14:58:37 -07:00 |
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port_address.py
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Correct wordline_driver enable to en, not en_bar.
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2019-07-05 10:31:05 -07:00 |
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port_data.py
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Added write mask to write driver array
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2019-08-08 08:46:58 -07:00 |
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precharge_array.py
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Add direction to pins of all modules
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2019-08-06 14:14:09 -07:00 |
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replica_bitcell_array.py
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Added graph fixes to handmade multiport cells.
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2019-07-30 20:31:32 -07:00 |
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replica_column.py
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Add direction to pins of all modules
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2019-08-06 14:14:09 -07:00 |
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sense_amp.py
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Merged and fixed conflicts with dev
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2019-06-25 16:55:50 -07:00 |
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sense_amp_array.py
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Add direction to pins of all modules
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2019-08-06 14:14:09 -07:00 |
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single_level_column_mux_array.py
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Merge branch 'pep8_cleanup' into dev
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2019-06-14 08:47:10 -07:00 |
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tri_gate.py
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Merged and fixed conflicts with dev
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2019-06-25 16:55:50 -07:00 |
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tri_gate_array.py
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Merge branch 'pep8_cleanup' into dev
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2019-06-14 08:47:10 -07:00 |
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wordline_driver.py
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Add direction to pins of all modules
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2019-08-06 14:14:09 -07:00 |
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write_driver.py
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Merged and fixed conflicts with dev
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2019-06-25 16:55:50 -07:00 |
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write_driver_array.py
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Shortened write driver enable pin so that a write mask can be used without a col mux in layout.
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2019-08-08 12:57:32 -07:00 |
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write_mask_and_array.py
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Added write mask to write driver array
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2019-08-08 08:46:58 -07:00 |
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