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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 01:24:39 +02:00
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0c286d6c29e0ea5268ef0ca9c8347d0cd58102a7
OpenRAM/technology/scn3me_subm
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Matt Guthaus 58e41a998f Replace write driver with human readable sp file.
2018-11-27 11:49:08 -08:00
..
gds_lib
Finish renaming replica bitcell and bitline pin names.
2018-09-04 14:03:15 -07:00
mag_lib
Clean up magic config file copying. Add warning for missing files.
2018-10-05 08:36:12 -07:00
models
Remove KP from SCMOS models to get rid of ngspice error.
2018-03-01 11:10:04 -08:00
sp_lib
Replace write driver with human readable sp file.
2018-11-27 11:49:08 -08:00
sue_lib
RELEASE 1.0
2016-11-08 09:57:35 -08:00
tech
Fixed spacing in golden lib files. Added column mux into analytical model.
2018-10-24 00:16:26 -07:00
tf
Change SCMOS comment drawing to stipple for easier visibility
2018-09-05 13:43:45 -07:00
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