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Architecture
This page of the documentation explains the architecture of OpenRAM.
Table of Contents
SRAM Architecture
- Bit-cell Array
- Multiport Bitcells
- Each port:
- Address Decoder(s)
- Wordline Driver(s)
- Column Multiplexer(s)
- Bitline Precharge(s)
- Sense Amplifier(s)
- Write Driver(s)
- Control Logic with Replica Bitline
