OpenRAM/technology/freepdk45
mrg b7c66d7e07 Changes to simplify metal preferred directions and pitches.
Changes to allow decoder height to be a 2x multiple of bitcell height.
Split of control logic tests.
Fixed track spacing in SRAM and channel router
PEP8 cleanup.
2020-05-10 11:32:45 -07:00
..
gds_lib Connected en together in write_mask_and_array. 2019-08-09 14:27:53 -07:00
sp_lib Add freepdk45 dummy cells 2019-07-03 14:53:44 -07:00
tech Changes to simplify metal preferred directions and pitches. 2020-05-10 11:32:45 -07:00
tf Add comment layer to display.drf so it is included in .lyp file. 2019-08-27 08:51:34 -07:00
__init__.py Fix space before comment 2019-06-14 08:43:41 -07:00
layers.map RELEASE 1.0 2016-11-08 09:57:35 -08:00