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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 09:30:38 +02:00
Code Issues Packages Projects Releases Wiki Activity
184 Commits 5 Branches 63 Tags
a840209c08bd8d72012ea0f48008e4d6df9cca08
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7 Commits
Author SHA1 Message Date
Matt Guthaus 34e180b901 Analytical delay model from Bin Wu. Unit test not passing. 2017-05-30 12:50:07 -07:00
mguthaus 7ca5c0b34f Added zoom to technology file so labels in each tech are readable size. Made default size. 2017-05-23 16:18:11 -07:00
Matt Guthaus fef708cffd Add slash in layers.map 2016-11-18 15:05:17 -08:00
Matt Guthaus 8934c1d3a4 Fixed layer map in runset files 2016-11-18 11:21:12 -08:00
Matt Guthaus b51c124810 Moved spice path to technology setup files instead of tech file itself. 2016-11-09 13:29:33 -08:00
Matt Guthaus db8a675d90 Clean up tech files to remove old parameters moved to premade cell classes. 2016-11-09 11:35:32 -08:00
Matt Guthaus f48272bde6 RELEASE 1.0 2016-11-08 09:57:35 -08:00
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