159 Commits

Author	SHA1	Message	Date
Matt Guthaus	b867e163a6	Move label pins to center like layout pins. ... Rework of control logic with vertical poly. Passes DRC/LVS. Single bank passing DRC.	2018-03-23 08:12:59 -07:00
Matt Guthaus	ed8eaed54f	Reworking control logic for veritcal poly. Rewrote delay line. Rewrote buffered-DFF array.	2018-03-23 08:12:47 -07:00
Matt Guthaus	4205a6a700	Connect bank supply rings in sram.py.	2018-03-05 13:49:22 -08:00
Matt Guthaus	0f721a3d40	Add vdd and gnd rails around bank structure.	2018-03-04 17:53:22 -08:00
Hunter Nichols	d0e6dc9ce7	First version of analytical power models. Still huge room for improvement. Analytical power printed with 1 verbose level.	2018-02-26 16:32:28 -08:00
Hunter Nichols	d4a0f48d4f	Added power calculations for inverter. Still testing.	2018-02-21 19:51:21 -08:00
Hunter Nichols	179a27b0e3	Added some power functions.	2018-02-20 18:22:23 -08:00
Hunter Nichols	8ea384a761	Fixed merging issues with power branch	2018-02-14 15:21:42 -08:00
Matt Guthaus	7100d6f904	Organize top-level files into subdirs.	2018-02-09 10:25:24 -08:00