14 Commits

Author	SHA1	Message	Date
mrg	0c3ee643ab	Remove add_mod and add module whenever calling add_inst.	2021-11-22 11:33:27 -08:00
Matt Guthaus	30fc81a1f0	Update copyright year.	2021-01-22 11:23:28 -08:00
mrg	87419bd640	Fix bitcell and pbitcell with different cell names	2020-11-03 11:30:40 -08:00
mrg	da721a677d	Remove EOL whitespace globally	2020-11-03 06:29:17 -08:00
mrg	fa89b73ef8	PR from mithro + other changable GDS file names	2020-11-02 16:00:16 -08:00
Matthew Guthaus	7397f110c5	Add bbox for special DRC rule boundary	2019-12-05 23:14:25 +00:00
Hunter Nichols	fc1cba099c	Made all cin function relate to farads and all input_load relate to relative units.	2019-08-08 01:57:04 -07:00
Matt Guthaus	a234b0af88	Fix space before comment	2019-06-14 08:43:41 -07:00
Matt Guthaus	0f03553689	Update copyright to correct years.	2019-05-06 06:50:15 -07:00
Matt Guthaus	3f9a987e51	Update copyright. Add header to all OpenRAM files.	2019-04-26 12:33:53 -07:00
Matt Guthaus	25bc3a66ed	Add far left option for contact placement in pgates.	2019-04-17 13:41:35 -07:00
Matt Guthaus	a418431a42	First draft of sram_factory code	2019-01-16 16:15:38 -08:00
Hunter Nichols	8957c556db	Added sense amp enable delay calculation.	2018-11-08 23:54:18 -08:00
Matt Guthaus	e90f9be6f5	Move replica bitcells to new bitcells subdir	2018-10-24 09:06:29 -07:00