Commit Graph

5 Commits

Author SHA1 Message Date
Matt Guthaus abee235963 Rewrite the parameterized transistor and gate classes.
Changes propagate through all designs.
All modules use instance and layout pins.
2017-12-12 15:04:01 -08:00
Matt Guthaus 3ea003c367 Fix 1-way single bank LVS bug. Full SRAM still not functional. 8-way has DRC error. 2017-09-11 14:30:52 -07:00
Matt Guthaus d17711c394 Fixed several LVS errors. Bank passes LVS for 2-way and 4-way, but not 1-way or 8-way. 2017-08-24 16:22:14 -07:00
Matt Guthaus cf940fb15d Development version of new pin data structure. Tests pass LVS/DRC except for bank level. 2017-08-23 15:02:15 -07:00
Matt Guthaus f48272bde6 RELEASE 1.0 2016-11-08 09:57:35 -08:00