Logo
Explore Help
Sign In
luke/OpenRAM
Watch 1
Star 0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 17:39:02 +02:00
Code Issues Packages Projects Releases Wiki Activity
499 Commits 5 Branches 63 Tags
0cc077598efc0eb7457c7150b5a53dcee052d712
Commit Graph
5 Commits
Author SHA1 Message Date
Matt Guthaus b31f3c18af Change BSIM3 models to version 3.3.0. Add comment about multithreading selection. 2018-02-21 17:50:12 -08:00
mguthaus 767990ca3b Update golden lib tests. Add new generic SCMOS models. Fix tech error with new msflop_in_cap name. 2018-02-13 15:54:50 -08:00
Matt Guthaus ccc8ed2b48 Add slow and fast SCMOS spice models. 2018-02-12 17:16:40 -08:00
mguthaus 6bf4190dde Fix missing tech name in path to spice models. Rename models to p,n. 2018-02-12 10:24:15 -08:00
Matt Guthaus a12ebeed9f Add multiple process corners. Unit tests use nominal corner only. Add fake SCMOS nominal models, but they are broken. 2018-02-12 09:33:23 -08:00
Powered by Gitea Version: 1.27.2 Page: 577ms Template: 49ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API